4 Commits

Author SHA1 Message Date
dbc23d80e4
lab-08: fix register file - disable writing when WRITE=0 2024-10-24 23:11:59 -07:00
c3da7787d3
lab-08: fix HiZ on register file when READ=0 2024-10-24 12:35:34 -07:00
3091103f81
lab-07: gate level model for 32-bit register
Gate level implementation for the following components:
- SR_LATCH
- D_LATCH
- D_FF
- REG1
- REG32
2024-10-19 18:39:30 -07:00
5520d6d716
initial commit 2024-10-01 10:39:56 -07:00