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(WIP): D Latch and D FlipFlop

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This commit is contained in:
Yuri Tatishchev 2024-10-19 15:47:35 -07:00
parent d217faf166
commit 7c0645eaa1
Signed by: CaZzzer
GPG Key ID: E0EBF441EA424369
1 changed files with 9 additions and 2 deletions
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11
logic.v
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@ -69,7 +69,11 @@ input D, C;
input nP, nR;
output Q,Qbar;
// TBD
wire Cbar, Y, Ybar;
not C_inv(Cbar, C);
D_LATCH dlatch(Y, Ybar, D, Cbar, nP, nR);
SR_LATCH srlatch(Q, Qbar, Y, Ybar, C, nP, nR);
endmodule
@ -82,7 +86,10 @@ input D, C;
input nP, nR;
output Q,Qbar;
// TBD
wire Dbar;
not D_inv(Dbar, D);
SR_LATCH latch(Q, Qbar, D, Dbar, C, nP, nR);
endmodule