CaZzzer/cs147dv
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

control unit: more progress, fibonacci working

Browse Source
This commit is contained in:
Yuri Tatishchev 2024-11-18 00:47:16 -08:00
parent 2ffd8c9424
commit b651f04748
Signed by: CaZzzer
GPG Key ID: E0EBF441EA424369
6 changed files with 42 additions and 35 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
OUTPUT/CS147_SP15_HW01_02_mem_dump_01.dat
View File

@ -1,9 +1,9 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000000
00000000
00000000
00000000
00000000
00000001
00000004
00000004
00000010
00000010
00000040

2
OUTPUT/CS147_SP15_HW01_02_mem_dump_02.dat
View File

@ -6,4 +6,4 @@
00000000
00000000
00000000
00000000
00000200

22
OUTPUT/CS147_SP17_HW01_02_mem_dump.dat
View File

@ -1,14 +1,14 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
0000000a
0000000b
0000000c
0000000d
0000000e
0000000f
00000010
00000011
00000012
00000013
00000000
00090001
00090003
00090005
00090007
00090009
0009000b
0009000d
0009000f
00090011
00090013
00090015

2
OUTPUT/RevFib_mem_dump.dat
View File

@ -16,4 +16,4 @@
00000000
00000000
00000000
00000000
00000059

30
OUTPUT/fibonacci_mem_dump.dat
View File

@ -2,18 +2,18 @@
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000001
00000001
00000002
00000003
00000005
00000008
0000000d
00000015
00000022
00000037
00000059
00000090
000000e9
00000179
00000262

9
control_unit.v
View File

@ -171,6 +171,8 @@ endtask
reg read, write;
buf (READ, read);
buf (WRITE, write);
//assign READ = read;
//assign WRITE = write;
reg [31:0] C;
@ -313,13 +315,18 @@ always @ (state) begin
// wd_sel_3 - pc_inc or wd_sel_2
// jal - pc_inc, else wd_sel_2
C[`wd_sel_3] = opcode == 6'h03 ? 1'b0 : 1'b1;
// ma_sel_1 - alu_out for lw or sw, sp for push or pop
C[`ma_sel_1] = opcode == `OP_LW || opcode == `OP_SW ? 1'b0 : 1'b1;
// ma_sel_2 - 1 for pc, 0 for everything else
C[`ma_sel_2] = opcode == `OP_LW || opcode == `OP_SW || opcode == `OP_PUSH || opcode == `OP_POP ? 1'b0 : 1'b1;
// md_sel_1 - r1 for push, r2 for sw
C[`md_sel_1] = opcode == 6'h1b ? 1'b1 : 1'b0;
end
`PROC_MEM: begin
// load now
// push or sw - write to memory
if (opcode == 6'h1b || opcode == 6'h2b) begin
if (opcode == `OP_PUSH || opcode == `OP_SW) begin
read = 1'b0;
write = 1'b1;
end