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lab-08: fix HiZ on register file when READ=0

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This commit is contained in:
Yuri Tatishchev
2024-10-21 20:25:05 -07:00
parent eca53c1104
commit c3da7787d3
2 changed files with 20 additions and 15 deletions
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13
TESTBENCH/register_file_tb.v
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@@ -84,7 +84,6 @@ begin
else
no_of_pass = no_of_pass + 1;
result[ridx] = DATA_R1; ridx=ridx+1;
result[ridx] = DATA_R1; ridx=ridx+1;
end
@@ -100,10 +99,20 @@ begin
else
no_of_pass = no_of_pass + 1;
result[ridx] = DATA_R1; ridx=ridx+1;
result[ridx] = DATA_R1; ridx=ridx+1;
end
// Test reading when READ=0
#5 READ=1'b0;
#5 no_of_test = no_of_test + 1;
if (DATA_R1 !== 32'bx)
$write("[TEST @ %0dns] READ=0, expecting DATA_R1 to be 32{x}, got %8h [FAILED]\n", $time, DATA_R1);
else if (DATA_R2 !== 32'bx)
$write("[TEST @ %0dns] READ=0, expecting DATA_R2 to be 32{x}, got %8h [FAILED]\n", $time, DATA_R2);
else
no_of_pass = no_of_pass + 1;
result[ridx] = DATA_R1; ridx=ridx+1;
// TODO: Read and write from the same address at the same time?
#5 READ=1'b0; WRITE=1'b0; // No op