WIP: failed attempt to use many-input or gates
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@ -18,7 +18,7 @@ reg LnR;
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wire [31:0] Y;
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integer reg_idx;
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reg [`DATA_INDEX_LIMIT:0] result[0:63];
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reg [`DATA_INDEX_LIMIT:0] result[0:123];
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integer i, e;
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integer no_of_test=0;
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@ -33,7 +33,7 @@ D=32'ha5a5a5a5;
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S=32'h00000000;
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LnR=1'b1; // left shift
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for(i=1; i<33; i=i+1)
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for(i=1; i<63; i=i+1)
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begin
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#5
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no_of_test = no_of_test + 1;
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@ -51,7 +51,7 @@ end
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#5 LnR=1'b0; // right shift
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for(i=1; i<33; i=i+1)
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for(i=1; i<63; i=i+1)
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begin
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#5
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no_of_test = no_of_test + 1;
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15
alu.v
15
alu.v
@ -31,11 +31,12 @@ input [`ALU_OPRN_INDEX_LIMIT:0] OPRN; // operation code
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output [`DATA_INDEX_LIMIT:0] OUT; // result of the operation.
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output ZERO;
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wire [31:0] res,
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wire [31:0] //res,
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res_addsub, res_slt,
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res_shift,
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res_mul,
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res_and, res_or, res_nor;
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wire [31:0] res;
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// add = xx0001
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// sub = xx0010
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@ -71,16 +72,10 @@ MUX32_16x1 out(.Y(res), .S(OPRN[3:0]),
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);
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// or bits of result for zero flag
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wire nzf [31:0];
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buf (nzf[0], res[0]);
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genvar i;
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generate
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for (i = 1; i < 32; i = i + 1) begin : zf_gen
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or (nzf[i], nzf[i-1], res[i]);
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end
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endgenerate
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wire nzf;
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or (nzf, res[24:0]);
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not (ZERO, nzf[31]);
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not (ZERO, nzf);
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buf res_out [31:0] (OUT, res);
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endmodule
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@ -22,20 +22,14 @@ input [31:0] S;
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input LnR;
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// check if upper bits are nonzero
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wire oob [31:5];
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buf (oob[5], S[5]);
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genvar i;
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generate
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for (i = 6; i < 32; i = i + 1) begin : shift_oob_gen
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or (oob[i], oob[i-1], S[i]);
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end
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endgenerate
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wire oob;
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or (oob, S[31:5]);
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wire [31:0] shifted;
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BARREL_SHIFTER32 shifter(shifted, D, S[4:0], LnR);
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// return 0 if S >= 32
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MUX32_2x1 mux_oob(Y, shifted, 32'b0, oob[31]);
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MUX32_2x1 mux_oob(Y, shifted, 32'b0, oob);
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endmodule
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