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project: track output

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This commit is contained in:
Yuri Tatishchev 2024-11-17 01:14:29 -08:00
parent 8810726d65
commit 1e1d0f0e05
Signed by: CaZzzer
GPG Key ID: E0EBF441EA424369
22 changed files with 611 additions and 0 deletions
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8
OUTPUT/AND32_2x1_TB.out Executable file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/AND32_2x1_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000000
00000000
ffff0000
0000ffff

13
OUTPUT/CS147_FL15_HW01_02_mem_dump.dat Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

9
OUTPUT/CS147_SP15_HW01_02_mem_dump_01.dat Normal file
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@ -0,0 +1,9 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000000
00000000
00000000
00000000
00000000

9
OUTPUT/CS147_SP15_HW01_02_mem_dump_02.dat Normal file
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@ -0,0 +1,9 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000000
00000000
00000000
00000000
00000000

14
OUTPUT/CS147_SP17_HW01_02_mem_dump.dat Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
0000000a
0000000b
0000000c
0000000d
0000000e
0000000f
00000010
00000011
00000012
00000013
00000000

8
OUTPUT/INV32_1x1_TB.out Executable file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/INV32_1x1_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
0000ffff
ffffffff
5a5a5a5a
0000ffff
ffff0000

8
OUTPUT/NOR32_2x1_TB.out Executable file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/NOR32_2x1_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
ffffffff
00000000
0000ffff
ffff0000

8
OUTPUT/OR32_2x1_TB.out Executable file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/OR32_2x1_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
ffffffff
00000000
ffffffff
ffff0000
0000ffff

19
OUTPUT/RevFib_mem_dump.dat Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

147
OUTPUT/alu_tb.out Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/ALU_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000014
00000001
00000000
00000001
00000064
00000001
00000000
00000001
00002800
00000001
0000000a
00000001
0000000a
00000001
fffffff5
00000000
00000000
00000001
00000000
00000001
ffffffe2
00000001
ffffff1f
00000000
0001ffff
00000000
fff88000
00000001
00000001
00000000
ffffffff
00000000
00000000
00000001
00000001
00000000
00000000
00000001
00000032
00000001
fffffd8f
00000000
00000000
00000001
00000000
00000001
00000001
00000000
ffffffff
00000000
00000000
00000001
00000000
00000001
ffffffc4
00000001
00000000
00000001
00000384
00000001
00000000
00000001
00000000
00000001
ffffffe2
00000001
ffffffe2
00000001
0000001d
00000000
00000000
00000001
00000000
00000001
00000000
00000001
00000000
00000001
00000000
00000001
00000000
00000001
00000000
00000001
00000000
00000001
ffffffff
00000000
00000000
00000001
0000001b
00000000
ffffffc7
00000000
fffffd8a
00000001
00000000
00000001
00000000
00000001
00000020
00000001
fffffffb
00000000
00000004
00000001
00000001
00000000
00000017
00000000
00000017
00000000
00000000
00000001
00000017
00000000
00000017
00000000
00000000
00000001
00000017
00000000
ffffffe8
00000001
00000000
00000001
00000046
00000001
ffffffba
00000001
00000000
00000001
00000000
00000001
00000000
00000001
00000000
00000001
00000046
00000001
ffffffb9
00000000
00000001
00000000

129
OUTPUT/barret_shifter_tb.out Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/BARREL_SHIFTER32_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
4b4b4b4a
96969694
2d2d2d28
5a5a5a50
b4b4b4a0
69696940
d2d2d280
a5a5a500
4b4b4a00
96969400
2d2d2800
5a5a5000
b4b4a000
69694000
d2d28000
a5a50000
4b4a0000
96940000
2d280000
5a500000
b4a00000
69400000
d2800000
a5000000
4a000000
94000000
28000000
50000000
a0000000
40000000
80000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
52d2d2d2
29696969
14b4b4b4
0a5a5a5a
052d2d2d
02969696
014b4b4b
00a5a5a5
0052d2d2
00296969
0014b4b4
000a5a5a
00052d2d
00029696
00014b4b
0000a5a5
000052d2
00002969
000014b4
00000a5a
0000052d
00000296
0000014b
000000a5
00000052
00000029
00000014
0000000a
00000005
00000002
00000001
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
xxxxxxxx
xxxxxxxx

10
OUTPUT/d_ff_tb.out Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/D_FF_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000012
00000013
0000000b
00000017
0000000d
0000000f
00000017

11
OUTPUT/d_latch_tb.out Normal file
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@ -0,0 +1,11 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/D_LATCH_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000022
00000023
00000027
00000011
00000013
00000017
0000002f
0000001b

10
OUTPUT/d_reg1_tb.out Normal file
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@ -0,0 +1,10 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/REG1_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000022
00000023
0000000b
0000002f
0000001d
0000001f
00000023

11
OUTPUT/d_reg32_tb.out Normal file
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@ -0,0 +1,11 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/REG32_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000000
a5a5a5a5
ffff0000
00000000
00000000
0000ffff
0000ffff

35
OUTPUT/decoder_5x32_tb.out Normal file
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@ -0,0 +1,35 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/DECODER_5x32_TB/result
// format=bin addressradix=h dataradix=b version=1.0 wordsperline=1 noaddress
00000000000000000000000000000001
00000000000000000000000000000010
00000000000000000000000000000100
00000000000000000000000000001000
00000000000000000000000000010000
00000000000000000000000000100000
00000000000000000000000001000000
00000000000000000000000010000000
00000000000000000000000100000000
00000000000000000000001000000000
00000000000000000000010000000000
00000000000000000000100000000000
00000000000000000001000000000000
00000000000000000010000000000000
00000000000000000100000000000000
00000000000000001000000000000000
00000000000000010000000000000000
00000000000000100000000000000000
00000000000001000000000000000000
00000000000010000000000000000000
00000000000100000000000000000000
00000000001000000000000000000000
00000000010000000000000000000000
00000000100000000000000000000000
00000001000000000000000000000000
00000010000000000000000000000000
00000100000000000000000000000000
00001000000000000000000000000000
00010000000000000000000000000000
00100000000000000000000000000000
01000000000000000000000000000000
10000000000000000000000000000000

19
OUTPUT/fibonacci_mem_dump.dat Normal file
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@ -0,0 +1,19 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

19
OUTPUT/mux32_16x1_tb.out Normal file
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@ -0,0 +1,19 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/MUX32_16x1_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000001
00000002
00000003
00000004
00000005
00000006
00000007
00000008
00000009
0000000a
0000000b
0000000c
0000000d
0000000e
0000000f

5
OUTPUT/mux32_2x1_tb.out Normal file
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@ -0,0 +1,5 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/MUX32_2x1_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
a5a5a5a5
5a5a5a5a

35
OUTPUT/mux32_32x1_tb.out Normal file
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@ -0,0 +1,35 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/MUX32_32x1_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000001
00000002
00000003
00000004
00000005
00000006
00000007
00000008
00000009
0000000a
0000000b
0000000c
0000000d
0000000e
0000000f
00000010
00000011
00000012
00000013
00000014
00000015
00000016
00000017
00000018
00000019
0000001a
0000001b
0000001c
0000001d
0000001e
0000001f

67
OUTPUT/rf_tb.out Normal file
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@ -0,0 +1,67 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/RF_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
0000000a
00000014
0000001e
00000028
00000032
0000003c
00000046
00000050
0000005a
00000064
0000006e
00000078
00000082
0000008c
00000096
000000a0
000000aa
000000b4
000000be
000000c8
000000d2
000000dc
000000e6
000000f0
000000fa
00000104
0000010e
00000118
00000122
0000012c
00000136
00000014
00000014
00000014
00000014
00000014
00000014
00000014
00000014
00000014
00000014
00000014
00000014
00000014
00000014
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx

17
OUTPUT/sr_latch_tb.out Normal file
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@ -0,0 +1,17 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/SR_LATCH_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000042
00000043
00000047
0000004b
0000004f
00000021
00000023
00000027
0000002b
0000002f
0000005b
00000053
00000037
00000033