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project: add da vinci test programs

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This commit is contained in:
Yuri Tatishchev 2024-11-12 19:26:45 -08:00
parent 88b635122f
commit 02781c283f
Signed by: CaZzzer
GPG Key ID: 28BE602058C08557
24 changed files with 341 additions and 0 deletions
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4
.gitignore vendored
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@ -27,3 +27,7 @@ sc_dpiheader.h
vsim.dbg vsim.dbg
# End of https://www.toptal.com/developers/gitignore/api/modelsim # End of https://www.toptal.com/developers/gitignore/api/modelsim
!TESTPROGRAM/*.dat
!GOLDEN/*.dat
!OUTPUT/*.dat

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GOLDEN/CS147_FL15_HW01_02_mem_dump_golden.dat Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000020
00000020
00000010
00000010
00000009
00000008
00000008
00000005
00000004
00000002

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GOLDEN/CS147_SP15_HW01_02_mem_dump_01_golden.dat Normal file
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@ -0,0 +1,9 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000001
00000004
00000004
00000010
00000010
00000000

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GOLDEN/CS147_SP15_HW01_02_mem_dump_02_golden.dat Normal file
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@ -0,0 +1,9 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000020
00000008
00000008
00000002
00000002

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GOLDEN/CS147_SP17_HW01_02_mem_dump_golden.dat Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000015
00000017
00000019
0000001b
0000001d
0000001f
00000021
00000023
00000025
00000025
00000000

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GOLDEN/RevFib_mem_dump.golden.dat Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
ffffffc9
00000022
ffffffeb
0000000d
fffffff8
00000005
fffffffd
00000002
ffffffff
00000001
00000000
00000001
00000001
00000002
00000003
00000005

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GOLDEN/fibonacci_mem_dump.golden.dat Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000001
00000001
00000002
00000003
00000005
00000008
0000000d
00000015
00000022
00000037
00000059
00000090
000000e9
00000179
00000262

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OUTPUT/CS147_FL15_HW01_02_mem_dump.dat Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

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OUTPUT/CS147_SP17_HW01_02_mem_dump.dat Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
0000000a
0000000b
0000000c
0000000d
0000000e
0000000f
00000010
00000011
00000012
00000013
00000000

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OUTPUT/RevFib_mem_dump.dat Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

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OUTPUT/fibonacci_mem_dump.dat Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

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OUTPUT/full_adder.out Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/FULL_ADDER_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000001
00000001
00000002
00000001
00000002
00000002
00000003

7
OUTPUT/half_adder.out Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/HALF_ADDER_TB/results
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000001
00000001
00000002

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OUTPUT/mult32_tb.out Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/MULT_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000000000c8
000000000000002d
ffffffffffffff90
ffffffffffffff42
3100000000000000
cf00000000000000
cf00000000000000
3100000000000000

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OUTPUT/mult32_u_tb.out Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/MULT_U_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000000000c8
000000000000002d
0000000000000070
00000000000000be
006975a0b62bf524

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OUTPUT/rc_add_sub_32.out Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/RC_ADD_SUB_32_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
0000001e
fffffff6
00000003
00000004
00005555

5
OUTPUT/twoscomp32_tb.out Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/TWOSCOMP32_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
fffffff6
00000005

5
OUTPUT/twoscomp64_tb.out Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/TWOSCOMP64_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
fffffffffffffff6
0000000000000005

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TESTPROGRAM/CS147_FL15_HW01_02.dat Normal file
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// ------ Program Part ----
@0001000
2021000A // addi r1, r1, 0xA;
20421008 // addi r2, r2, 0x1008;
00401301 // sll r2, r2, 0xC;
00411820 // add r3, r2, r1;
3C848000 // lui r4, r4, 0x8000;
8C450000 // LOOP: lw r5, r2,0x0;
8C660000 // lw r6, r3, 0x0;
00A63822 // sub r7, r5, r6;
00E44024 // and r8, r7, r4;
15280003 // bne r8, r9, L1;
20C00000 // addi r0, r6, 0x0;
20630001 // addi r3, r3, 0x1;
0800100F // jmp L2;
20A00000 // L1: addi r0, r5, 0x0;
20420001 // addi r2, r2, 0x1;
6C000000 // L2: push
2021FFFF // addi r1, r1, 0xFFFF;
1521FFF3 // bne r1, r9, LOOP;
// ------ Data Part ----
@01008000
005 // 01008000
008 // 01008001
009 // 01008002
010 // 01008003
020 // 01008004
029 // 01008005
02D // 01008006
02F // 01008007
032 // 01008008
037 // 01008009
002 // 0100800A
004 // 0100800B
008 // 0100800C
010 // 0100800D
020 // 0100800E
040 // 0100800F
080 // 01008010
100 // 01008011
200 // 01008012
400 // 01008013

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TESTPROGRAM/CS147_SP15_HW01_02.dat Normal file
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@0001000
20000001 // addi r0, r0, 0x1;
20210002 // addi r1, r1, 0x2;
20420000 // addi r2, r2, 0x0;
3C630100 // lui r3, 0x100;
34638000 // ori r3, r3, 0x8000;
20840005 // addi r4, r4, 0x5;
00010020 // LOOP: add r0, r0, r1;
00010822 // sub r1, r0, r1;
00010022 // sub r0, r0, r1;
AC610000 // sw r1, r3, 0x0;
20630001 // addi r3, r3, 0x1;
6C000000 // push;
00000041 // sll r0, r0, 0x1;
00200841 // sll r1, r1, 0x1;
20420001 // addi r2, r2, 0x1;
1482FFF6 // bne r2, r4, LOOP;

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TESTPROGRAM/CS147_SP17_HW01_02.dat Normal file
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// ------ Program Part ----
@0001000
20001008 // addi r0, r0, 0x1008
00000301 // sll r0, r0, 0xC
20420009 // addi r2, r2, 0x9
10410007 // LOOP: beq r1, r2, END
8C030000 // lw r3, r0, 0x0
8C040001 // lw r4, r0, 0x1
00642820 // add r5, r3, r4
AC050000 // sw r5, r0, 0x0
20000001 // addi r0, r0, 0x1
20210001 // addi r1, r1, 0x1
08001003 // j LOOP
AC050000 // END: sw r5, r0, 0x0
// ------ Data Part ----
@01008000
0A // 0100 8000
0B // 0100 8001
0C // 0100 8002
0D // 0100 8003
0E // 0100 8004
0F // 0100 8005
10 // 0100 8006
11 // 0100 8007
12 // 0100 8008
13 // 0100 8008

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TESTPROGRAM/RevFib.dat Normal file
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@ -0,0 +1,16 @@
@0001000
20210005 // addi r1, r1, 0x5
20420003 // addi r2, r2, 0x3
20200000 // addi r0, r1, 0x0
6c000000 // push
20400000 // loop : addi r0, r2, 0x0
6c000000 // push
20430000 // addi r3, r2, 0x0
00221022 // sub r2, r1, r2
20610000 // addi r1, r3, 0x0
08001004 // jmp loop
00000000 // nop
00000000 // nop

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TESTPROGRAM/fibonacci.dat Normal file
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@ -0,0 +1,13 @@
@0001000
20420001 // addi r2, r2, 0x0001;
3C000100 // lui r0, 0x0100;
AC010000 // sw r1, r0, 0x0000;
20000001 // loop: addi r0, r0, 0x0001;
AC020000 // sw r2, r0, 0x0000;
20430000 // addi r3, r2, 0x0000;
00411020 // add r2, r2, r1;
20610000 // addi r1, r3, 0x0000;
08001003 // jmp loop;

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TESTPROGRAM/mem_content_01.dat Normal file
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@ -0,0 +1,11 @@
@0001000
00414020 00414021 00414022 00414023 // sample data
00414024 00414025 00414026 00414027
00414028 00414029 0041402a 0041402b
0041402c 0041402d 0041402e 0041402f
@002f00a
00514020 00514021 00514022 00514023
00514024 00514025 00514026 00514027
00514028 00514029 0051402a 0051402b
0051402c 0051402d 0051402e 0051402f