project: add da vinci test programs

This commit is contained in:
2024-11-12 19:26:45 -08:00
parent 88b635122f
commit 02781c283f
24 changed files with 341 additions and 0 deletions

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// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

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// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
0000000a
0000000b
0000000c
0000000d
0000000e
0000000f
00000010
00000011
00000012
00000013
00000000

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@@ -0,0 +1,19 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

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@@ -0,0 +1,19 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/DA_VINCI_TB/da_vinci_inst/memory_inst/memory_inst/sram_32x64m
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

11
OUTPUT/full_adder.out Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/FULL_ADDER_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000001
00000001
00000002
00000001
00000002
00000002
00000003

7
OUTPUT/half_adder.out Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/HALF_ADDER_TB/results
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000
00000001
00000001
00000002

11
OUTPUT/mult32_tb.out Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/MULT_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000000000c8
000000000000002d
ffffffffffffff90
ffffffffffffff42
3100000000000000
cf00000000000000
cf00000000000000
3100000000000000

8
OUTPUT/mult32_u_tb.out Normal file
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@@ -0,0 +1,8 @@
// memory data file (do not edit the following line - required for mem load use)
// instance=/MULT_U_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
00000000000000c8
000000000000002d
0000000000000070
00000000000000be
006975a0b62bf524

8
OUTPUT/rc_add_sub_32.out Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/RC_ADD_SUB_32_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
0000001e
fffffff6
00000003
00000004
00005555

5
OUTPUT/twoscomp32_tb.out Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/TWOSCOMP32_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
fffffff6
00000005

5
OUTPUT/twoscomp64_tb.out Normal file
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// memory data file (do not edit the following line - required for mem load use)
// instance=/TWOSCOMP64_TB/result
// format=hex addressradix=h dataradix=h version=1.0 wordsperline=1 noaddress
fffffffffffffff6
0000000000000005