CaZzzer
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  • Joined on 2021-03-03
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CaZzzer created pull request CaZzzer/cs147dv#1 2024-11-24 09:31:00 +00:00
WIP: Project
CaZzzer pushed to project-1 at CaZzzer/cs147dv 2024-11-24 09:16:04 +00:00
a7870b87eb project: more cleanup
CaZzzer pushed to project-1 at CaZzzer/cs147dv 2024-11-20 10:01:57 +00:00
0361dcc161 project: some cleanup
CaZzzer pushed to project-1 at CaZzzer/cs147dv 2024-11-20 08:57:25 +00:00
ceba9d6fd5 control unit: fix jal, add comprehensive instruction test
CaZzzer pushed to project-1 at CaZzzer/cs147dv 2024-11-19 07:21:22 +00:00
0198e8be41 control unit: fix stack pointer inc/dec, passing SP15, FL15, RevFib
507fa2e863 control unit: passing SP15 and SP17
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CaZzzer pushed to project-1 at CaZzzer/cs147dv 2024-11-18 08:48:55 +00:00
b651f04748 control unit: more progress, fibonacci working
2ffd8c9424 da vinci tb: patch for smaller (20-bit) memory for faster tests
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CaZzzer pushed to project-1 at CaZzzer/cs147dv 2024-11-17 12:55:56 +00:00
05c950a0f8 control unit: progress
5d64b65212 data path: replace instruction register with D-latch
9e6d1d5df2 control unit: ctrl signal refactor
1e1d0f0e05 project: track output
8810726d65 project: minor refactors
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CaZzzer pushed to project-1 at CaZzzer/cs147dv 2024-11-17 00:50:08 +00:00
02781c283f project: add da vinci test programs
CaZzzer pushed to project-1 at CaZzzer/cs147dv 2024-11-13 03:27:24 +00:00
f2c3470b5c project: add da vinci test programs
CaZzzer pushed to project-1 at CaZzzer/cs147dv 2024-11-13 03:26:56 +00:00
ceb533710e project: add da vinci test programs
CaZzzer pushed to project-1 at CaZzzer/cs147dv 2024-11-13 02:27:00 +00:00
88b635122f (WIP) control unit: initial implementation of things
CaZzzer created branch project-1 in CaZzzer/cs147dv 2024-11-13 02:27:00 +00:00
CaZzzer pushed to project at CaZzzer/cs147dv 2024-11-13 02:14:59 +00:00
d10a3d6130 data path: fix port connection warnings
CaZzzer pushed to project at CaZzzer/cs147dv 2024-11-12 21:13:54 +00:00
a2d547df45 data path: initial gate level implementation
ff1c1630b2 data path: add initial wires and buffers
ff6e7792f4 misc: fix unconnected port warnings for ALU and TWOSCOMP
9584db84fd logic: add 32-bit register with parameterized preset pattern
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CaZzzer pushed to master at CaZzzer/cs147dv 2024-11-12 21:12:27 +00:00
ff6e7792f4 misc: fix unconnected port warnings for ALU and TWOSCOMP
9584db84fd logic: add 32-bit register with parameterized preset pattern
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CaZzzer created branch project in CaZzzer/cs147dv 2024-11-12 09:50:26 +00:00
CaZzzer pushed to project at CaZzzer/cs147dv 2024-11-12 09:50:26 +00:00
e28120c3d9 data path: initial gate level implementation
64d34cc7e9 logic: add 32-bit register with parameterized preset pattern
0c1de19af1 data path: add initial wires and buffers
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CaZzzer pushed to master at CaZzzer/vpgen 2024-11-02 08:56:45 +00:00
cffeade642 opnsense connections page ui improvements
2368fa4a1c initial opnsense connections page
3b2ed4ddea routing improvements
7169bf0fb1 layout improvements
31d23c5e87 improve layout, nav; add sign out on user page
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CaZzzer pushed to feature/opnsense at CaZzzer/vpgen 2024-11-02 08:53:52 +00:00
cffeade642 opnsense connections page ui improvements
2368fa4a1c initial opnsense connections page
3b2ed4ddea routing improvements
7169bf0fb1 layout improvements
31d23c5e87 improve layout, nav; add sign out on user page
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CaZzzer created branch feature/opnsense in CaZzzer/vpgen 2024-11-02 08:53:52 +00:00