From f5b19ae9fc1f67738c1c623cbe0c05735fdcb3e5 Mon Sep 17 00:00:00 2001 From: Yuri Tatishchev Date: Thu, 3 Oct 2024 20:25:36 -0700 Subject: [PATCH] lab-02: fix behavioral xor statement in RC_ADD_SUB modules --- rc_add_sub_32.v | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/rc_add_sub_32.v b/rc_add_sub_32.v index 86cf55b..5418e4f 100644 --- a/rc_add_sub_32.v +++ b/rc_add_sub_32.v @@ -37,7 +37,9 @@ genvar i; generate for (i = 0; i < 64; i = i + 1) begin : add64_gen_loop - FULL_ADDER add64_inst(Y[i], C[i+1], A[i], B[i] ^ SnA, C[i]); + wire B_xor; + xor (B_xor, B[i], SnA); + FULL_ADDER add64_inst(Y[i], C[i+1], A[i], B_xor, C[i]); end endgenerate @@ -62,7 +64,9 @@ genvar i; generate for (i = 0; i < 32; i = i + 1) begin : add32_gen_loop - FULL_ADDER add32_inst(Y[i], C[i+1], A[i], B[i] ^ SnA, C[i]); + wire B_xor; + xor (B_xor, B[i], SnA); + FULL_ADDER add32_inst(Y[i], C[i+1], A[i], B_xor, C[i]); end endgenerate