diff --git a/logic.v b/logic.v
index 7588cd9..a575ad1 100644
--- a/logic.v
+++ b/logic.v
@@ -95,7 +95,13 @@ input S, R, C;
 input nP, nR;
 output Q,Qbar;
 
-// TBD
+wire r1, r2;
+
+nand n1(r1, C, S);
+nand n2(r2, C, R);
+
+nand n3(Q, nP, r1, Qbar);
+nand n4(Qbar, nR, r2, Q);
 
 endmodule