From d10a3d61308a5c8d1aec0f8a018c049f9d48fa71 Mon Sep 17 00:00:00 2001 From: Yuri Tatishchev Date: Tue, 12 Nov 2024 01:49:30 -0800 Subject: [PATCH] data path: fix port connection warnings --- data_path.v | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/data_path.v b/data_path.v index f9c89dd..5e6ac98 100644 --- a/data_path.v +++ b/data_path.v @@ -40,7 +40,7 @@ wire pc_load, pc_sel_1, pc_sel_2, pc_sel_3, ma_sel_1, ma_sel_2, md_sel_1; -wire alu_oprn [5:0]; +wire [5:0] alu_oprn; buf (pc_load, CTRL[0]); buf (pc_sel_1, CTRL[1]); @@ -119,8 +119,8 @@ wire [31:0] r1_sel, wa_sel, wd_sel; wire [31:0] wa_sel_p1, wa_sel_p2, wd_sel_p1, wd_sel_p2; wire [31:0] imm_zx_lsb; buf imm_zx_lsb_buf [31:0] (imm_zx_lsb, {imm, 16'b0}); -MUX32_2x1 mux_r1_sel(r1_sel, rs, 32'b0, r1_sel_1); -MUX32_2x1 mux_wa_sel_p1(wa_sel_p1, rd, rt, wa_sel_1); +MUX32_2x1 mux_r1_sel(r1_sel, {27'b0,rs}, 32'b0, r1_sel_1); +MUX32_2x1 mux_wa_sel_p1(wa_sel_p1, {27'b0,rd}, {27'b0,rt}, wa_sel_1); // TODO: Why 31? MUX32_2x1 mux_wa_sel_p2(wa_sel_p2, 32'b0, 31, wa_sel_2); MUX32_2x1 mux_wa_sel(wa_sel, wa_sel_p2, wa_sel_p1, wa_sel_3); @@ -128,8 +128,8 @@ MUX32_2x1 mux_wd_sel_p1(wd_sel_p1, alu_out,DATA_IN, wd_sel_1); MUX32_2x1 mux_wd_sel_p2(wd_sel_p2, wd_sel_p1, imm_zx_lsb, wd_sel_2); MUX32_2x1 mux_wd_sel(wd_sel, pc_inc, wd_sel_p2, wd_sel_3); // Register File -REGISTER_FILE_32x32 rf_inst(.DATA_R1(r1), .DATA_R2(r2), .ADDR_R1(r1_sel), .ADDR_R2(rt), - .DATA_W(wd_sel), .ADDR_W(wa_sel), .READ(reg_r), .WRITE(reg_w), .CLK(CLK), .RST(RST)); +REGISTER_FILE_32x32 rf_inst(.DATA_R1(r1), .DATA_R2(r2), .ADDR_R1(r1_sel[4:0]), .ADDR_R2(rt), + .DATA_W(wd_sel), .ADDR_W(wa_sel[4:0]), .READ(reg_r), .WRITE(reg_w), .CLK(CLK), .RST(RST)); // ALU Input wire [31:0] op1_sel, op2_sel; @@ -139,19 +139,19 @@ buf shamt_zx_buf [31:0] (shamt_zx, {27'b0, shamt}); buf imm_sx_buf [31:0] (imm_sx, {{16{imm[15]}}, imm}); buf imm_zx_buf [31:0] (imm_zx, {16'b0, imm}); MUX32_2x1 mux_op1_sel(op1_sel, r1, sp, op1_sel_1); -MUX32_2x1 mux_op2_sel_p1(op2_sel_p1, 31'b1, shamt_zx, op2_sel_1); +MUX32_2x1 mux_op2_sel_p1(op2_sel_p1, 32'b1, shamt_zx, op2_sel_1); MUX32_2x1 mux_op2_sel_p2(op2_sel_p2, imm_zx, imm_sx, op2_sel_2); MUX32_2x1 mux_op2_sel_p3(op2_sel_p3, op2_sel_p2, op2_sel_p1, op2_sel_3); MUX32_2x1 mux_op2_sel(op2_sel, op2_sel_p3, r2, op2_sel_4); // ALU -ALU alu_inst(.Y(alu_out), .ZERO(ZERO), .OP1(op1_sel), .OP2(op2_sel), .OPRN(alu_oprn)); +ALU alu_inst(.OUT(alu_out), .ZERO(ZERO), .OP1(op1_sel), .OP2(op2_sel), .OPRN(alu_oprn)); // Progam Counter Input wire [31:0] pc_sel; wire [31:0] pc_offset, pc_jump, pc_sel_p1, pc_sel_p2; -RC_ADD_SUB_32 pc_inc_inst(.Y(pc_inc), .A(pc), .B(32'b1), .SnA(1'b0)); +RC_ADD_SUB_32 pc_inc_inst(.Y(pc_inc), .CO(), .A(pc), .B(32'b1), .SnA(1'b0)); MUX32_2x1 mux_pc_sel_p1(pc_sel_p1, r1, pc_inc, pc_sel_1); -RC_ADD_SUB_32 pc_sel_2_inst(.Y(pc_offset), .A(pc), .B(imm_sx), .SnA(1'b0)); +RC_ADD_SUB_32 pc_sel_2_inst(.Y(pc_offset), .CO(), .A(pc), .B(imm_sx), .SnA(1'b0)); MUX32_2x1 mux_pc_sel_p2(pc_sel_p2, pc_sel_p1, pc_offset, pc_sel_2); buf pc_jump_buf [31:0] (pc_jump, {6'b0, addr}); MUX32_2x1 mux_pc_sel(pc_sel, pc_jump, pc_sel_p2, pc_sel_3); @@ -170,6 +170,8 @@ MUX32_2x1 mux_data_out(DATA_OUT, r2, r1, md_sel_1); wire [31:0] ma_sel_p1; MUX32_2x1 mux_ma_sel_p1(ma_sel_p1, alu_out, sp, ma_sel_1); // TODO: Check address calculation since it's 26 bit -MUX32_2x1 mux_ma_sel(ADDR, ma_sel_p1, pc, ma_sel_2); +(* keep="soft" *) +wire [5:0] _addr_ignored; +MUX32_2x1 mux_ma_sel({_addr_ignored,ADDR}, ma_sel_p1, pc, ma_sel_2); endmodule